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THNIDXXXXBX series rev1.7 2002-06-11 1/23 nand flash drive --- THNIDXXXXBX series --- outline the THNIDXXXXBX nand flash drive series from toshiba features an ide interface, a flash disk controller chip, and nand-type flash memory devices. there are two form factors, 2.5 inch-type and 3.5 inch-type, available in the series. the THNIDXXXXBX is available in 16 mb, 32 mb, 64 mb, 128 mb, 192 mb, 256 mb, 320 mb, 384 mb, 512 mb, 640 mb, 1024 mb, 1536 mb and 2048 mb capacities in each type. the drives operate with a 5-volts power supply and support mode 4 pio data transfer. the nand flash drive is geared specifically to the industrial market for use in atm, factory automation machine, pos terminal, measuring product, ticket-vending machine, parking system and other industrial products that require high tolerance to environmental condition. features ? capacity 16mb up to 2gb ? form factor 2.5 inch-type, 3.5 inch-type, (hdd compatible) ? ide interface mode4 pio ata command set compatible ? power supply v cc = 5.0 v 10% ? operating temperature ? 40c~85c (industrial grade : THNIDXXXXBXi) 0c~70c (commercial grade : THNIDXXXXBX) ? performance burst data transfer rate (drive-host) 16.6 mb/sec. (max) sustained write speed 3.2 mb/sec. (max) sustained read speed 6.5 mb/sec. (max) shock 9800 m/s 2 (max) " non-operating $? vibration 147 m/s 2 peak (25~2000 hz) [operating] ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in g eneral can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibi lity of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, a nd to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury o r damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handlin g guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfun ction o r failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energ y control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion cont rol instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this docume n t shall be made at the customer?s own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assume d b y toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from i ts use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation o r others. ? the information contained herein is subject to change without notice. 000707 eba1
THNIDXXXXBX series rev1.7 2002-06-11 2/23 product models 2.5 inch-type unformatted cylinder head sector model no. 16 mb 248 4 32 thnid016mba/bai 32 mb 496 4 32 thnid032mba/bai 64 mb 978 4 32 thnid064mba/bai 128 mb 978 8 32 thnid128mba/bai 192 mb 733 16 32 thnid192mba/bai 256 mb 978 16 32 thnid256mba/bai 320 mb 814 16 48 thnid320mba/bai 384 mb 977 16 48 thnid384mba/bai 512 mb 993 16 63 thnid512mba/bai 640 mb 1241 16 63 thnid640mba/bai 1024 mb 1985 16 63 thnid1g02ba/bai 1536 mb 2966 16 63 thnid1g53ba/bai 2048 mb 3954 16 63 thnid2g04ba/bai 3.5 inch-type unformatted cylinder head sector model no. 16 mb 248 4 32 thnid016mbb/bbi 32 mb 496 4 32 thnid032mbb/bbi 64 mb 978 4 32 thnid064mbb/bbi 128 mb 978 8 32 thnid128mbb/bbi 192 mb 733 16 32 thnid192mbb/bbi 256 mb 978 16 32 thnid256mbb/bbi 320 mb 814 16 48 thnid320mbb/bbi 384 mb 977 16 48 thnid384mbb/bbi 512 mb 993 16 63 thnid512mbb/bbi 640 mb 1241 16 63 thnid640mbb/bbi 1024 mb 1985 16 63 thnid1g02bb/bbi 1536 mb 2966 16 63 thnid1g53bb/bbi 2048 mb 3954 16 63 thnid2g04bb/bbi
THNIDXXXXBX series rev1.7 2002-06-11 3/23 product specification ? storage capacities: 16, 32, 64, 128, 192, 256, 320, 384, 512, 640, 1024, 1536, 2048 mbytes (unformatted) ? performance: to/from host 16.6 mbytes/sec. (max theoretical) sustained write 3.2 mbyte/sec. (max) [ata pio mode 4] ( 64 mb) 1.5 mbyte/sec. (max) [ata pio mode 4] (16 mb~32 mb) sustained read 6.5 mbyte/sec. (max) [ata pio mode 4] ? operating voltage: 5v + / ? 10% ? power consumption: read mode 51 ma (typ) write mode 43 ma (typ) idle mode 16 ma (typ) sleep mode 1 ma (typ) ( 64 mb) 3 ma (typ) (2 gb) ? environmental specification: operating temperature ? 40c to 85c (industrial grade : THNIDXXXXBXi) 0c to 70c (commercial grade : THNIDXXXXBX) storage temperature ? 40c to 85c (industrial grade : THNIDXXXXBXi) ? 20c to 85c (commercial grade : THNIDXXXXBX) humidity 95% (max) [no condensation] shock 9800 m/s 2 (max) (3 axis) [no-operating] vibration 147 m/s 2 peak (25hz~2000hz) [operating] ? reliability: error rate <1 bit/10 15 bit read ecc 1 bit error connection
THNIDXXXXBX series rev1.7 2002-06-11 4/23 mechanical specification absolute maximum ratings symbol parameter value unit v cc power supply voltage ? 0.6 to 6.0 v v in input voltage ? 0.3 to v cc + 0.3 v t stg storage temperature ? 40 to 85 (industrial grade) 0 to 70 (commercial grade) c t opr operating temperature ? 40 to 85 (industrial grade) ? 20 to 85 (commercial grade) c recommended dc operating conditions symbol parameter min typ max unit v cc power supply voltage 4.5 5.0 5.5 v v ih high level input voltage 2.0 ? v v il low level input voltage ? 0.8 v dc characteristics (ta = ? 40c to 85c , v cc = 5.0 v 10%) symbol parameter min typ max unit i ccr operating current (read) 51 ma i ccw operating current (write) 43 ma sleep mode current ( < = 64 mb) 1 ma i ccs sleep mode current (2 gb) 3 ma v oh high level output voltage v cc ? 0.8 ? ? v v ol low level output voltage ? ? 0.4 v
THNIDXXXXBX series rev1.7 2002-06-11 5/23 package dimensions 3.5 inch 95.25 10-6.32unc `??? 6.35 44.45 41.28 60 41.6 28.5 25.9 101.6 146.5 3.5 inch flash drive dimensions
THNIDXXXXBX series rev1.7 2002-06-11 6/23 2.5 inch 4.07 4.07 69.85 101.55 16-m3 9.50 17.57 38.10 20.93 14.00 3.00 2.5 flash drive dimensions
THNIDXXXXBX series rev1.7 2002-06-11 7/23 jumper settings 3.5 inch 2.5 inch master slave cable select 1 1 1 cable select 1 master slave 1 1
THNIDXXXXBX series rev1.7 2002-06-11 8/23 pin assignments and pin type pin number signal name pin type pin number signal name pin type 1 reset i 2 gnd ? 3 dd7 i/o 4 dd8 i/o 5 dd6 i/o 6 dd9 i/o 7 dd5 i/o 8 dd10 i/o 9 dd4 i/o 10 dd11 i/o 11 dd3 i/o 12 dd12 i/o 13 dd2 i/o 14 dd13 i/o 15 dd1 i/o 16 dd14 i/o 17 dd0 i/o 18 dd15 i/o 19 gnd ? 20 key(nc) ? 21 dmarq(nc) ? 22 gnd ? 23 diow i 24 gnd ? 25 dior i 26 gnd ? 27 reserved o 28 csel i 29 dmack (nc) ? 30 gnd ? 31 intrq o 32 reserved ? 33 da1 i 34 pdiag i/o 35 da0 i 36 da2 i 37 0 cs i 38 1 cs i 39 dasp i/o 40 gnd ? 41 vcc ? 42 vcc ? 43 gnd ? 44 ? ? note 1: pins #41 to 44 are for the ide 44-pin standard (2.5 inch-type). note 2: to avoid damage to the drive or its pins, be sure to connect the drive to the ide connecter properly note 3: ?i? is defined as a direction from the host to the drive. ?o? is defined as a direction from the drive to the host. 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 power supply jumper pin jumper pin 3.5 inch (40 pins) 2.5 inch (44 pins) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
THNIDXXXXBX series rev1.7 2002-06-11 9/23 signal description signal name dir. pin description reset i 1 this pin is shall be used by host to reset the device. reset signal is from the host and it is active low. dd[0:15] i/o 3 to 18 these lines carry data, commands and status information between the host and controller. dd[0] is the lsb and dd[15] is the msb. diow i 23 diow is the strobe signal asserted by the host to write the device register. dior i 25 dior is the strobe signal asserted by the host to read the device register intrq o 31 this signal is used by the selected device to interrupt the host system when interrupt pending is set. when the nien bit is cleared to zero and the device is selected, intrq shall be enabled through a tri-state buffer. when the nien bit is set to one or the device is not selected, the intrq signal shall be released. da[0: 2] i 33, 35, 36 da[2:0] are used to select one of eight registers 0 cs , 1 cs i 37, 38 0 cs is used to select the command block registers while 1 cs is used to select the control block register. csel i 28 csel is used to select master/slave mode, low for master, high for slave mode. pdiag i/o 34 this bi-directional open drain signal is asserted by the slave after an execute diagnostic command to indicate to the master it has passed its diagnostics. dasp i/o 39 this open drain output is asserted low any time the drive is active. in a master/slave configuration, this signal is used for the slave to inform the master that a slave drive is present. gnd 2, 19, 22, 24, 26, 30, 40, 43 ground vcc 41, 42 power
THNIDXXXXBX series rev1.7 2002-06-11 10/23 i/o register specifications the data is transferred between the host system and the device via i/o registers in the device. reads and writes to the registers are performed using the following logics. read i/o register function mode 1 cs 0 cs da0~da2 dior diow dd8~dd15 dd0~dd7 invalid mode l l high-z high-z standby mode h h high-z high-z data register access h l 0 l h odd byte even byte alternate status access l h 6h l h high-z status out other command block register access h l 1~7h l h high-z data note: : l or h write i/o register function mode 1 cs 0 cs da0~da2 dior diow dd8~dd15 dd0~dd7 invalid mode l l don?t care don?t care standby mode h h don?t care don?t care data register access h l 0 h l odd byte even byte control register access l h 6h h l don?t care control in other command block register access h l 1~7h h l don?t care data note: x: l or h i/o register address this table summarizes the register selected by da0~da2. 1 cs 0 cs da2 da1 da0 dior = l diow = l 1 0 0 0 0 data register data register 1 0 0 0 1 error register feature register 1 0 0 1 0 sector count register sector count register 1 0 0 1 1 sector number register sector number register 1 0 1 0 0 cylinder low register cylinder low register 1 0 1 0 1 cylinder high register cylinder high register 1 0 1 1 0 device/head register drive head register 1 0 1 1 1 status register command register 0 1 1 1 0 alt. status register device control register 0 1 1 1 1 drive address register reserved register access timing example da0~da2 read cycle dd0~dd15 dout dior diow din write cycle cs
THNIDXXXXBX series rev1.7 2002-06-11 11/23 1. data register: this register is a 16-bit register that has read/write capability. is used for transferring 1 sector of data between the drive and the host. bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 dd0~dd15 2. error register: this register is read-only. it contains info on errors that occur when the drive is being accessed. this register is valid when the bsy bit in status register and alternate status register are set to ?0? bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bbk unc ?0? idnf ?0? abrt ?0? amnf bit name function 7 bbk (bad block detected) this bit is set when a bad block is detected. 6 unc (data ecc error) this bit is set when an uncorrectable error has occurred when reading the drive. 4 idnf (id not found) this bit is set when the requested sector is in error or cannot be found. 2 abrt (aborted command) this bit is set if the command has been aborted because of the drive status condition. not ready, write fault, invalid command 0 amnf (address mark not found) this bit is set in case of a general error. 3. feature register: this register is write-only. it provides information regarding features of the drive that the host wishes to utilize. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 feature byte 4. sector count register: this register contains the number of sectors of data requested to be transferred via a read or write operation between the host and the drive. if the value of this register is zero, a count of 256 sectors is specified. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sector count byte
THNIDXXXXBX series rev1.7 2002-06-11 12/23 5. sector number register: this register contains the starting sector number, which is started by following sector transfer command. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sector number byte 6. cylinder low register: this register contains the low 8-bits of the starting cylinder address, which is started by following sector transfer command. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 cylinder low byte 7. cylinder high register: this register contains the high 8-bits of the starting cylinder address, which is started by following sector transfer command. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 cylinder high byte 8. device/head register: this register is used for selecting the drive number and head number for the following command. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 obsolete lba obsolete drv head number bit name function 7 obsolete this bit is set to ?1?. 6 lba lba is a flag to select either cylinder/head/sector (chs) or logical block address (lba) mode. when lba = 0, chs mode is selected. when lba = 1, lba mode is selected. in lba mode, the logical block address is interpreted as follows: lba07-lba00: sector number register d7-d0. lba15-lba08: cylinder low register d7-d0. lba23-lba16: cylinder high register d7-d0. lba27-lba24: drive/head register bits hs3-hs0. 5 obsolete this bit is set to ?1?. 4 dev (device select) this bit is used for selecting the master (drive 0) and slave (drive 1) in master/slave organization. cleared to zero selects the master (drive 0) 3 head number this bit is used for selecting the head number for the following command. bit 3 is msb.
THNIDXXXXBX series rev1.7 2002-06-11 13/23 9. status register: this register is read-only. it indicates the status of the command execution. the contents of this register are updated to reflect the current state of the device and the progress of any command being executed by the device. reading this register when an interrupt is pending causes the pending interrupt to be cleared. the host should not read the status register when an interrupt is expected as this may clear the pending interrupt before the intrq can be recognized by the host. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bsy drdy dwf dsc drq corr obsolete err bit name function 7 bsy (busy) this bit is set to ?1? when an internal operation is executing. when this bit is set to ?1?, other bits in this register are invalid. 6 drdy (drive ready) this bit is set to ?1? when an internal operation has been ended and the drive is capable of being accessed from the host. 5 dwf (drive write fault) this bit is set to ?1? if this drive indicates a write fault status. 4 dsc (drive seek complete) this bit is set to ?1? when the drive seek is complete. 3 drq (data request) this bit is set to ?1? when the device is ready to transfer a word of data between the host and data register. 2 corr (corrected data) this bit is set to ?1? when a correctable data error has occurred and the data has been corrected. 1 obsolete this bit is always set to ?0?. 0 err (error) this bit is set to ?1? when the previous command has ended in some type of error. the error information is set in the error register. this bit is cleared by the next command. 10. alternate status register: this register is the same as the status register in the command block. the bit assignment is same as the prior description of the status register. but this register is different from the status register in that -ireq is not negated when data is read.
THNIDXXXXBX series rev1.7 2002-06-11 14/23 11. device control register: this register is write-only. this register allows a host to software reset attached devices and to enable or disable the assertion of the intrq signal by a selected device. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reserved srst nien 0 bit name function 7~3 x reserved bits 2 srst (software reset) this bit is set to ?1? in order to have the drive perform software reset operation. the drive remains in reset until this bit is set to ?0?. 1 nien (interrupt enable) this bit is used to enable intrq. when this bit is set to?0?, intrq is active. when this bit is set to ?1?, intrq is high impedance. 0 0 this bit is set to ?0?. 12. drive address register: this register is read-only. it is used for confirming the drive status. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 nwtg nhs3 nhs2 nhs1 nhs0 nds1 nds0 bit name function 7 x this bit is unknown. it remains in tri-state, when host read. 6 nwtg (writing gate) ?0? 5~2 nhs3-0 (head select 3~0) these 4 bits are the negative value of head number in the drive/head register. 1 nds1 (idrive select 1) this bit is ?0?, when drive 1 is selected. 0 nds0 (idrive select 0) this bit is ?0?, when drive 0 is selected.
THNIDXXXXBX series rev1.7 2002-06-11 15/23 13. command register: this register is write-only. each command to be executed is written to this register, after setting the parameters as follows. used parameter command command code fr sc sn cy dr hd lba check power mode e5h or 98h n n n n y n n execute drive diagnostic 90h n n n n y n n cfa erase sector c0h n y y y y y y format track 50h n y n y y y y identify drive ech n n n n y n n idle e3h or 97h n y n n y n n idle immediate e1h or 95h n n n n y n n initialize drive parameters 91h n y n n y y n read buffer e4h n n n n y n n read multiple c4h n y y y y y y read long sector 22h or 23h n n y y y y y read sector 20h or 21h n y y y y y y read verify sector 40h or 41h n y y y y y y recalibrate 1xh n n n n y n n cfa request extended error 03h n n n n y n n seek 7xh n n y y y y y set features efh y n n n y n n set multiple mode c6h n y n n y n n sleep e6h or 99h n n n n y n n stand by e2h or 96h n n n n y n n stand by immediate e0h or 94h n n n n y n n cfa translate sector 87h n n y y y y y cfa wear level f5h n n n n y n n write buffer e8h n n n n y n n write long sector 32h or 33h n n y y y y y write multiple c5h n y y y y y y cfa write multiple w/o erase cdh n y y y y y y write sector 30h or 31h n y y y y y y cfa write sector w/o erase 38h n y y y y y y write verify 3ch n y y y y y y note: fr: feature register sc: sector count register sn: sector number register cy: cylinder low/high register dr: drv bit of drive head register hd: head number of drive/head register lba: logical block address mode supported y: the register contains a valid parameter for this command n: the register does not contain a valid parameter for this command
THNIDXXXXBX series rev1.7 2002-06-11 16/23 ata command specification 1. check power mode (code: e5h or 98h): this command checks the power mode. 2. execute drive diagnostic (code: 90h): this command performs the internal diagnostic tests implemented by the drive. 3. cfa erase sector (s) (code: c0h): this command is used to erase data sectors. 4. format track (code: 50h): this command writes the desired head and cylinder of the selected drive. but selected sector data is not exchanged. this drive expects one sector (512 bytes) of data from the host to follow the command with the same protocol as the write sector command 5. identify drive (code: ech): this command enables the host to receive parameter information from the drive. identify drive information word address default value total bytes data field type information 0 040ah 2 general configuration bit-significant information 1 xxxx 2 default number of cylinders 2 0000h 2 reserved 3 00xxh 2 default number of heads 4 xxxx 2 number of unformatted bytes per track 5 xxxx 2 number of unformatted bytes per sector 6 xxxx 2 default number of sectors per track 7 to 8 xxxx 4 reserved 9 0000h 2 reserved 10 to 19 xxxx 20 serial number in ascii 20 0001h 2 buffer type(single ported) 21 0004h 2 buffer size in 512 byte increments 22 0004h 2 # of ecc bytes passed on read/write long commands 23 to 46 xxxx 48 firmware revision in ascii etc. 47 0001h 2 maximum number of sectors on read/write multiple command 48 0000h 2 double word not supported 49 0200h 2 capabilities: dma not supported (bit8), lba supported (bit9) 50 0000h 2 reserved 51 0400h 2 pio data transfer cycle timing mode 4 52 0000h 2 dma data transfer cycle timing mode not supported 53 to 58 xxxx 12 reserved 59 0101h 2 multiple sector setting is valid 60 to 61 xxxx 4 total number of sectors addressable in lba mode 62 to 255 0000h 388 reserved 6. idle (code: e3h or 97h): this command causes the drive to set bsy, enter the idle mode, clear bsy and generate an interrupt. if the sector count is non-zero, the automatic power down mode is enabled. if the sector count is zero, the automatic power mode is disabled. 7. idle immediate (code: e1h or 95h): this command causes the drive to set bsy, enter the idle(read) mode, clear bsy and generate an interrupt.
THNIDXXXXBX series rev1.7 2002-06-11 17/23 8. initialize drive parameters (code: 91h): this command enables the host to set the number of sectors per track and the number of heads per cycle. 9. read buffer (code: e4h): this command enables the host to read the current contents of the drive?s sector buffer. 10. read multiple (code: c4h): this command performs similarly to the read sectors command. interrupts are not generated on each sector, but on the transfer of a block which contains the number of sectors defined by a set multiple command. 11. read long sector (code 22h or 23h): this command performs similarly to the read sector(s) command except that it returns 516 bytes of data instead of 512 bytes. 12. read sector(s) (code 20h, 21h): this command reads from 1 to 256 sectors as specified in the sector count register. a sector count of 0 requests 256 sectors. the transfer beings at the sector specified in the sector number register. 13. read verify sector(s) (code: 40h or 41h): this command is identical to the read sectors command, except that drq is never set and no data is transferred to the host. 14. recalibrate (code: 1xh): this command is effectively a nop command to the drive and is provided for compatibility purposes. 15. cfa request extended error (code: 03h): this command requests an extended error code after command ends with an error. 16. seek (code: 7xh): this command is effectively a nop command to the drive although it does perform a range check. 17. set features (code: efh): this command is used by the host to establish or select certain features. feature operation 01h enable 8-bit data transfers.(cfa feature set only) 55h disable read look ahead. 66h disable power on reset (por) establishment of defaults at soft reset. 81h disable 8-bit data transfers. (cfa feature set only) bbh 4 bytes of data apply on read/write long commands. cch enable power on reset (por) establishment of defaults at soft reset. 18. set multiple mode (code: c6h): this command enables the drive to perform read and write multiple operations and establishes the block count for these commands. 19. sleep (code: e6h or 99h): this command causes the drive to set bsy, enter the sleep mode, clear bsy and generate an interrupt. 20. stand by (code: e2h or 96h): this command causes the drive to set bsy, enter the standby mode, clear bsy and return the interrupt immediately. 21. stand by immediate (code: e0h or 94h): this command causes the drive to set bsy, enter the mode, clear bsy and return the interrupt immediately 22. cfa translate sector (code: 87h): this command allows the host a method of determining the exact number of times a use sector has been erased and programmed 23. cfa wear level (code: f5h): this command is effectively a nop command and only implemented for backward compatibility. the sector count register will always be returned with a 00h indicating wear level is not needed. 24. write buffer (code: e8h): this command enables the host to overwrite contents of the drive?s sector buffer with any data pattern desired. 25. write long sector (code: 32h or 33h): this command is provided for compatibility purposes and is similar to the write sector(s) command except that it writes 516 bytes instead of 512 bytes.
THNIDXXXXBX series rev1.7 2002-06-11 18/23 26. write multiple (code: c5h): this command is similar to the write sector(s) command. interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by set multiple command. 27. cfa write multiple without erase (code: cdh): this command is similar to the write multiple command with the exception that an implied erase before write operation is not performed. 28. write sector(s) (code: 30h or 31h): this command writes from 1 to 256 sectors as specified in the sector count register. a sector count of zero requests 256 sectors. the transfer begins at the sector specified in the sector number register. 29. cfa write sector(s) without erase (code: 38h): this command is similar to the write sector(s) command with the exception that an implied erase before write operation is not performed. 30. write verify(s) (code: 3ch): this command is similar to the write sector(s) command, except each sector is verified immediately after being written.
THNIDXXXXBX series rev1.7 2002-06-11 19/23 sector transfer protocol 1. sector read: the protocol of sector(s) read is as follows. set the cylinder low/high register set the head no. of drive head register set the sector number register set in sector count register set ?2 h? in command register read the status register read 256 times from the data register ( 512 b y tes ) ?58 h?? get all data? wait the command input start ?58 h?? ?51 h? error handle (1) set the logical sector number (2) set read sector command (3) polling until ready (4) burst data transfer (5) read more sectors? n y n n y i/o access, index = 1
THNIDXXXXBX series rev1.7 2002-06-11 20/23 2. sector write: the protocol of write sector(s) is as follows. set the cylinder low/high register set the head no. of drive head register set the sector number register set in sector count register set ?30 h? in command register read the status register write 256 times into the data register ( 512 b y tes ) read the status register ?58 h?? all data write ?50 h?? wait the command input start ?58 h?? ?51 h? ?51 h? error handle (1) set the logical sector number (2) set write sector command (3) polling until ready (4) burst data transfer (5) write more sector n y y y n n n n y
THNIDXXXXBX series rev1.7 2002-06-11 21/23 ac characteristics (ta = = = = ? ? ? ? 40 ~ + + + + 85c, v cc = = = = 5 v 10%) access read ac characteristics parameter symbol min typ. max unit data delay after dior td (dior) ? ? 50 ns data hold following dior th (dior) 5 ? ? ns dior width time tw (dior) 70 ? ? ns address setup before dior tsua (dior) 15 ? ? ns address hold following dior tha (dior) 10 ? ? ns cs setup before dior tsucs (dior) 5 ? ? ns cs hold following dior thcs (dior) 10 ? ? ns access read timing tha (dior) thce (dior) tw (dior) td (dior) tsuce (dior) tsua (dior) an cs dior dd [0:15] th (dior)
THNIDXXXXBX series rev1.7 2002-06-11 22/23 access write ac characteristics parameter symbol min typ. max unit data setup before diow tsu (diow) 20 ? ? ns data hold following diow th (diow) 10 ? ? ns diow width time tw (diow) 70 ? ? ns address setup before diow tsua (diow) 15 ? ? ns address hold following diow tha (diow) 10 ? ? ns cs setup before diow tsucs (diow) 5 ? ? ns cs hold following diow thcs (diow) 10 ? ? ns access write timing tha (diow) thce (diow) tw (diow) td (diow) tsuce (diow) tsua (diow) an cs diow dd [0:15] th (diow)
THNIDXXXXBX series rev1.7 2002-06-11 23/23 power on reset characteristics this table summarizes the power on reset sequence. hard reset timing hard reset characteristics parameter symbol min typ max unit test conditions reset setup time tsu (reset) 2 ? ? ms reset pulse width tw (reset) 25 ? ? s attention for drive use ? after performing the reset or power off operation, the information of all registers is cleared. ? please do not insert or remove the drive while the host is active. ? after performing a hard reset, soft reset, power on reset or command input, commands cannot be applied to the drive while the bit7 (bsy) in the status register is ?high? level. flash drive will not respond in this case. ? it is recommended that the drive should be formatted using an operating system before using it. reset 0 cs , 1 cs tw (reset) tsu (reset)

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